| SI5330B-A00204-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330B-A00204-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330B-A00205-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330B-A00205-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330B-A00206-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330B-A00206-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330C-A00207-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330C-A00207-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330C-A00208-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330C-A00208-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330C-A00209-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330C-A00209-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330F-A00214-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330F-A00214-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330F-A00215-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330F-A00215-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330F-A00216-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330F-A00216-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330G-A00217-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330G-A00217-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330G-A00218-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330G-A00218-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330G-A00219-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330G-A00219-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330H-A00220-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330H-A00220-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330H-A00221-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330H-A00221-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330H-A00222-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330H-A00222-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330J-A00223-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330K-A00224-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330K-A00224-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330K-A00226-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330K-A00226-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330L-A00228-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330L-A00228-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330L-A00229-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330L-A00229-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330L-A00230-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330L-A00230-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330M-A00231-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330M-A00231-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330M-A00232-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330M-A00232-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5330M-A00233-GM |
Silicon Laboratories |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR |
20/158.78kb |
PDF
|
| SI5330M-A00233-GM |
Silicon Laboratories |
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs |
20/158.78kb |
PDF
|
| SI5338 |
Silicon Laboratories |
I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR |
170/715.58kb |
|
| SI5338-EVB |
Silicon Laboratories |
I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR |
170/715.58kb |
PDF
|
| SI5338-PROG-EVB |
Silicon Laboratories |
I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR |
170/715.58kb |
|
| SI5338A-A-GM |
Silicon Laboratories |
I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR |
170/715.58kb |
PDF
|
| SI5338A-A-GMR |
Silicon Laboratories |
I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR |
170/715.58kb |
|
| SI5338B-A-GM |
Silicon Laboratories |
I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR |
170/715.58kb |
PDF
|
| SI5338B-A-GMR |
Silicon Laboratories |
I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR |
170/715.58kb |
|
| SI5338C-A-GM |
Silicon Laboratories |
I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR |
170/715.58kb |
PDF
|
| SI5338C-A-GMR |
Silicon Laboratories |
I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR |
170/715.58kb |
|
| SI5338D-A-GM |
Silicon Laboratories |
I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR |
170/715.58kb |
PDF
|
| SI5338D-A-GMR |
Silicon Laboratories |
I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR |
170/715.58kb |
|
| SI5338E-A-GM |
Silicon Laboratories |
I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR |
170/715.58kb |
PDF
|
| SI5338E-A-GMR |
Silicon Laboratories |
I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR |
170/715.58kb |
|